Descriptor layout

Not Present Descriptor: (G,L,I)
  63                48 47  46 45 44  43  40 39                              0
 +--------------------+---+-----+---+------+---------------------------------+
 | XXXXXXXXXXXXXXXXXX | 0 | DPL | S | Type | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX |
 +--------------------+---+-----+---+------+---------------------------------+
63:48	- Available
47	- P (0)
46:45	- DPL (0-3)
44	- S
43:40	- Type
39:00	- Available

Segment Descriptor: (G,L)
  63    56 55 53 51 48 47  46 45 44  43  40 39            16 15             0
 +--------+---+--+----+---+-----+---+------+----------------+----------------+
 | BBBBBB |GD |LA| LL | 1 | DPL | 1 | 0EWA | BBBBBBBBBBBBBB | LLLLLLLLLLLLLL |
 |        |   |  |    |   |     |   | 1CRA |                |                |
 +--------+---+--+----+---+-----+---+------+----------------+----------------+
63:56	- Base[31:24]
55	- Granularity (0 = 1B, 1 = 4kB)
54	- D Bit size (0 = 16-bit, 1 = 32-bit)
53	- L (only on IA64) (0 = IA32e code, 1 = native 64-bit code)
52	- AVL
51:48	- Limit[19:16]
47	- Present (1) (0 = Not Present, 1 = Present)
46:45	- DPL (0-3)
44	- S (1) (0 = System, 1 = Code or Data)
43:40	- Type
39:32	- Base[23:16]
31:16	- Base[15:00]
15:00	- Limit[15:00]

TSS, LDT Descriptor: (G)
  63    56 55  52 51 48 47 46 45 44  43  40 39            16 15             0
 +--------+-+--+-+----+---+-----+---+------+----------------+----------------+
 | BBBBBB |G|00|A| LL | 1 | DPL | 0 | Type | BBBBBBBBBBBBBB | LLLLLLLLLLLLLL |
 +--------+-+--+-+----+---+-----+---+------+----------------+----------------+
63:56	- Base[31:24]
55	- Granularity
54:53	- 00
52	- AVL
51:48	- Limit[19:16]
47	- Present (1)
46:45	- DPL (0-3)
44	- S (0)
43:40	- Type (x001 = Available TSS, x011 = Busy TSS, 0010 = LDT)
39:32	- Base[23:16]
31:16	- Base[15:00]
15:00	- Limit[15:00]

Task Gate Descriptor: (G,L,I)
  63                48 47  46 45 44  43  40 39     32 31       16 15        0
 +--------------------+---+-----+---+------+---------+-----------+-----------+
 | XXXXXXXXXXXXXXXXXX | 1 | DPL | 0 | 0101 | XXXXXXX | SSSSSSSSS | XXXXXXXXX |
 +--------------------+---+-----+---+------+---------+-----------+-----------+
63:48	- Reserved
47	- P (1)
46:45	- DPL
44	- S (0)
43:40	- Type (0101 = Task Gate)
39:32	- Reserved
31:16	- TSS Segment Selector
15:00	- Reserved

Call Gate Descriptor: (G,L)
  63                48 47  46 45 44  43  40 39  36 32 31       16 15        0
 +--------------------+---+-----+---+------+---+-----+-----------+-----------+
 | OOOOOOOOOOOOOOOOOO | 1 | DPL | 0 | x100 |000| CNT | SSSSSSSSS | OOOOOOOOO |
 +--------------------+---+-----+---+------+---+-----+-----------+-----------+
63:48	- Offset[31:16]
47	- P (1)
46:45	- DPL
44	- S (0)
43:40	- Type (x100 = Call Gate)
39:37	- 000
36:32	- Parameter Count
31:16	- Segment Selector
15:00	- Offset[15:00]

Interrupt + Trap Gate Descriptor: (I)
  63                48 47  46 45 44  43  40 39  36 32 31       16 15        0
 +--------------------+---+-----+---+------+---+-----+-----------+-----------+
 | OOOOOOOOOOOOOOOOOO | 1 | DPL | 0 | x11y |000| XXX | SSSSSSSSS | OOOOOOOOO |
 +--------------------+---+-----+---+------+---+-----+-----------+-----------+
63:48	- Offset[31:16]
47	- P (1)
46:45	- DPL
44	- S (0)
43:40	- Type (x110 = Interrupt Gate, x111 = Trap Gate)
39:37	- 000
36:32	- Reserved
31:16	- Segment Selector
15:00	- Offset[15:00]

System Descriptor Types: (S = 0)
43:40	+
	| 0000 - Reserved		| 1000 - Reserved
	| 0001 - 286 Available TSS  (G) | 1001 - 386 Available TSS
	| 0010 - LDT		    (G) | 1010 - Reserved
	| 0011 - 286 Busy TSS	    (G) | 1011 - 386 Busy TSS
	| 0100 - 286 Call Gate	  (G,L) | 1100 - 386 Call Gate
	| 0101 - Task Gate	(G,L,I) | 1101 - Reserved
	| 0110 - 286 Interrupt Gate (I) | 1110 - 386 Interrupt Gate
	| 0111 - 286 Trap Gate	    (I) | 1111 - 386 Trap Gate

Non-System Descriptor Types: (S = 1)
43:40	+
        | 43 - Data/Code (0 = Data, 1 = Code)
        | 42 - E/C (0 = Expand-up, 1 = Expand-down / 0 = Non-Conforming, 1 = Conforming)
        | 41 - W/R (0 = Read-only, 1 = Read+Write / 0 = Execute-only, 1 = Execute+Read)
        | 40 - A (0 = Not Accessed, 1 = Accessed)


Invalid:	Non-system:	TSS+LDT:	Task gate:	Call gate:	Int+Trap gate:
Type		Type		Type		Type		Type		Type
		Flags						Parameters
		Base		Base		Selector	Selector	Selector
		Limit		Limit				Offset		Offset
		DPL		DPL		DPL		DPL		DPL
		p		p		p		p		p


Access rules:
Data segment: CPL <= DPL >= RPL
Stack segment: CPL == DPL == RPL
Code segment:
 Direct: C == 0, CPL == DPL, RPL <= CPL, CPL doesn't change
 	 C == 1, CPL >= DPL, RPL doesn't mattter, CPL doesn't change
 Call-Gate: CPL <= DPL >= RPL
   CALL: dest.C == 0, CPL >= dest.DPL, CPL:=dest.DPL, stack switch
   	 dest.C == 1, CPL >= dest.DPL, CPL doesn't change
   JMP:  dest.C == 0, CPL == dest.DPL
   	 dest.C == 1, CPL >= dest.DPL
 TSS:	    CPL <= TSS.DPL >= RPL
 Task-Gate: CPL <= Gate.DPL >= RPL


Page Entry layout

  31          12 11  9  8   7   6   5    4    3    2    1   0
 +--------------+-----+---+---+---+---+----+----+----+----+---+
 | Base / 2^12  | AVL | G | S | D | A | CD | WT | US | RW | P |
 +--------------+-----+---+---+---+---+----+----+----+----+---+

0 - Present
1 - Read-only (0) / Read-Write (1)
2 - User access from CPL=3 (1) / Supervisor only (0)
3 - Write-through caching (1) / Write-back caching (0)
4 - Cache disabled (1) / Cache enabled (0)
5 - Accessed
6 - Dirty (for PTE)/ reserved (for PDE)
7 - Page size (for PTE) / Page attribude table (for PDE): 4kB (0) / 4MB (1)
8 - Global (if set to 1, page is not invalidated on CR3 update), reserved for PDE
9:11 - Available
12:31 - Base address

Page Dir:	Page Table:
Indices
Present
Base Addr
Read/Write
User/Supervisor
Accessed/Dirty
Attributes
Raw
View
